We design state-of-the-art secure memories that protect against malicious attacks. Our inventions are the gatekeepers of every connected system, offering the highest level of security possible.
We cultivate an environment that empowers creativity and innovative thinking, which are needed to make our creations a reality. We value personal development and encourage further professional development towards our next goal.
Come and join our software team within the secured memory solutions silicon department.
You will join the effort of SW embedded programming including drivers, BOOTER, BSP, and more.
You will work closely with the uArch, design and application teams, to implement the required SW.
You are expected to use advanced embedded SW skills including Design and implement software of embedded devices and systems from requirements to production and commercial deployment and use advanced coding techniques for efficient (fast and small) code.
We’re looking for someone who is creative, critical thinking and has proven troubleshooting skills.
You should be highly professional, with the ability to deliver proven work on tight schedules, have excellent collaborative skills and the ability to work closely with Silicon design and HW design engineers.
In your role you will be implementing block/sub-system level logic design RTL using System Verilog. You will be involved in deep understanding of the design at multiple levels: the micro-architecture, features and specification. You will be working with pre-silicon validation engineers to validate the design and fix design bugs and physical implementation team. You must be a team player, willing to go the extra mile to achieve success.
Come and join our post silicon system validation team within the secured memory solutions silicon department. You will join the effort of validating, characterizing and debugging the silicon and will also take part in developing the post silicon HW and SW infrastructure and tools. You will work closely with the uArch, design and application teams, completing a full validation cycle including tests definition, implementation and execution on pre and post silicon environments. You are expected to use advanced debug techniques and complex use case scenarios to root cause silicon failures reported by users and customers.
We are looking for experienced BE engineer to work with us on Synopsys flow. Experience in running full flow from synthesis to P&R.
Working in block level and chip level. Running LVS & DRC checks and doing the cleanup.
Experience in implementing ECOs